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* Merge pull request #3508 from FernandoS27/page-tablebunnei2020-03-142-3/+24
|\ | | | | PageTable: move backing addresses to a children class as the CPU page table does not need them.
| * PageTable: move backing addresses to a children class as the CPU page table ↵Fernando Sahmkow2020-03-142-3/+24
| | | | | | | | | | | | | | | | does not need them. This PR aims to reduce the memory usage in the CPU page table by moving GPU specific parameters into a child class. This saves 1Gb of Memory for most games.
* | shader/transform_feedback: Add host API friendly TFB builderReinUsesLisp2020-03-131-0/+2
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* | video_core: Rename "const buffer locker" to "registry"ReinUsesLisp2020-03-091-2/+2
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* | gl_shader_cache: Rework shader cache and remove post-specializationsReinUsesLisp2020-03-091-2/+0
|/ | | | | Instead of pre-specializing shaders and then post-specializing them, drop the later and only "specialize" the shader while decoding it.
* common/math_util: Support float type rectanglesReinUsesLisp2020-02-281-2/+14
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* Merge pull request #3326 from FearlessTobi/port-5039bunnei2020-01-244-36/+23
|\ | | | | Port citra-emu/citra#5039: "common/logging: don't use regex for path trimming"
| * common/logging: don't use regex for path trimmingBreadFish642020-01-234-36/+23
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* | Address second part of review commentsFearlessTobi2020-01-231-1/+1
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* | Input: UDP Client to provide motion and touch controlsfearlessTobi2020-01-231-0/+9
|/ | | | | | | | An implementation of the cemuhook motion/touch protocol, this adds the ability for users to connect several different devices to citra to send direct motion and touch data to citra. Co-Authored-By: jroweboy <jroweboy@gmail.com>
* Remove unused CPU Vendor string and telemtry fieldJames Rowe2020-01-173-114/+0
| | | | The information is duplicated in the brand string and the telemetry field is unused
* Fix git version in scm_rev.cppJames Rowe2020-01-161-0/+5
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* common: SPSCQueue: Notify after incrementing queue size.bunnei2019-12-161-2/+9
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* fix clang-format and lambda captureWeiyi Wang2019-11-231-1/+2
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* unfold UNREACHABLE implementation for dumb compilersWeiyi Wang2019-11-231-2/+2
| | | We relies on UNREACHABLE's noreturn attribute to eliminate parent's "no return value" warning. However, this was wrapped in a `if(!false)` block, which compilers may not unfold to recognize the noreturn nature.
* common/logging: Silence no return value warningsReinUsesLisp2019-11-151-2/+6
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* common_funcs: Remove semicolons from INSERT_PADDING_* macrosLioncash2019-11-141-4/+6
| | | | | Makes code that uses the macros consistent by requiring the lines to be terminated with a semicolon.
* common/hash: Remove unused HashableStructLioncash2019-11-131-35/+0
| | | | | This is unused, so it can be removed. There's better ways of ensuring zeroed out padding bits, like using zero-initialization, anyhow.
* common_funcs: silence sign-conversion warnings in MakeMagic()Lioncash2019-11-131-1/+1
| | | | | We can trivially resolve these by casting the characters to unsigned values and then shifting the bits.
* ci: Populate build repository from Azure environmentZach Hilman2019-11-051-11/+2
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* common_func: Use std::array for INSERT_PADDING_* macros.bunnei2019-11-032-12/+17
| | | | - Zero initialization here is useful for determinism.
* common/bit_field: Remove FORCE_INLINE calls Tobias2019-11-031-2/+2
| | | | See bunneis comment here https://github.com/citra-emu/citra/pull/4629#discussion_r258533167. They were supposed to be removed by him, but he missed them.
* Merge pull request #2971 from FernandoS27/new-scheduler-v2David2019-10-281-0/+7
|\ | | | | Kernel: Implement a New Thread Scheduler V2
| * Kernel Scheduler: Make sure the global scheduler shutdowns correctly.Fernando Sahmkow2019-10-151-0/+7
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* | Shader_IR: Address Feedback.Fernando Sahmkow2019-10-261-1/+1
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* | VideoCore: Unify const buffer accessing along engines and provide ↵Fernando Sahmkow2019-10-252-2/+15
| | | | | | | | ConstBufferLocker class to shaders.
* | common/algorithm: Add description comment indicating intended algorithmsLioncash2019-10-151-0/+5
| | | | | | | | | | Makes it explicit that the header is intended for iterator-based algorithms that can ideally operate on any type.
* | common: Rename binary_find.h to algorithm.hLioncash2019-10-152-1/+2
|/ | | | | | Makes the header more general for other potential algorithms in the future. While we're at it, include a missing <functional> include to satisfy the use of std::less.
* alignment: Resolve allocator construction issues on debugLioncash2019-10-061-0/+5
| | | | | | | | | | | This was related to the source allocator being passed into the constructor potentially having a different type than allocator being constructed. We simply need to provide a constructor to handle this case. This resolves issues related to the allocator causing debug builds on MSVC to fail.
* alignment: Specify trait definitions within the allocatorLioncash2019-10-061-0/+5
| | | | | Allows containers and other data structures to consider optimizations based off of them. We satisfy all of these requirements anyways.
* Merge pull request #2942 from ReinUsesLisp/clang-warningsbunnei2019-10-051-1/+2
|\ | | | | Silence miscellaneous warnings
| * common/file_util: Silence -WswitchReinUsesLisp2019-10-041-1/+2
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* | Merge pull request #2943 from DarkLordZach/azure-titlebars-v2bunnei2019-10-053-0/+21
|\ \ | | | | | | ci: Add custom titlebars for mainline and patreon
| * | common: Add additional SCM revision fieldsZach Hilman2019-10-053-0/+21
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* | Shader_Ir: Refactor Decompilation process and allow multiple decompilation ↵Fernando Sahmkow2019-10-041-0/+2
| | | | | | | | modes.
* | shader_ir: Corrections to outward movements and misc stuffsFernando Sahmkow2019-10-041-0/+4
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* cmake: Add SCM detection for AzureZach Hilman2019-09-221-0/+3
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* log: Add logging class for Cheat EngineZach Hilman2019-09-212-0/+2
| | | This is better than just using something like Common.Filesystem or Common.Memory
* shader_ir: Implement VOTEReinUsesLisp2019-08-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement VOTE using Nvidia's intrinsics. Documentation about these can be found here https://developer.nvidia.com/reading-between-threads-shader-intrinsics Instead of using portable ARB instructions I opted to use Nvidia intrinsics because these are the closest we have to how Tegra X1 hardware renders. To stub VOTE on non-Nvidia drivers (including nouveau) this commit simulates a GPU with a warp size of one, returning what is meaningful for the instruction being emulated: * anyThreadNV(value) -> value * allThreadsNV(value) -> value * allThreadsEqualNV(value) -> true ballotARB, also known as "uint64_t(activeThreadsNV())", emits VOTE.ANY Rd, PT, PT; on nouveau's compiler. This doesn't match exactly to Nvidia's code VOTE.ALL Rd, PT, PT; Which is emulated with activeThreadsNV() by this commit. In theory this shouldn't really matter since .ANY, .ALL and .EQ affect the predicates (set to PT on those cases) and not the registers.
* Common/Alignment: Add noexcept where required.Fernando Sahmkow2019-07-191-5/+5
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* Kernel: Address FeedbackFernando Sahmkow2019-07-191-3/+2
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* Common: Correct alignment allocator to work on C++14 or higher.Fernando Sahmkow2019-07-191-37/+19
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* VM_Manager: Align allocated memory to 256bytesFernando Sahmkow2019-07-191-0/+79
| | | | | | This commit ensures that all backing memory allocated for the Guest CPU is aligned to 256 bytes. This due to how gpu memory works and the heavy constraints it has in the alignment of physical memory.
* shader_ir: Implement a new shader scannerFernando Sahmkow2019-07-091-0/+2
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* texture_cache: Address FeedbackFernando Sahmkow2019-07-053-10/+22
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* common/alignment: Address feedbackReinUsesLisp2019-06-241-2/+3
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* shader: Decode SUST and implement backing image functionalityReinUsesLisp2019-06-201-0/+1
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* texture_cache: Optimize GetMipBlockHeight and GetMipBlockDepthFernando Sahmkow2019-06-201-0/+44
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* video_core: Use un-shifted block sizes to avoid integer divisionsReinUsesLisp2019-06-201-0/+5
| | | | | | | | | | | | Instead of storing all block width, height and depths in their shifted form: block_width = 1U << block_shift; Store them like they are provided by the emulated hardware (their block_shift form). This way we can avoid doing the costly Common::AlignUp operation to align texture sizes and drop CPU integer divisions with bitwise logic (defined in Common::AlignBits).
* Reduce amount of size calculations.Fernando Sahmkow2019-06-201-0/+11
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