From 49dc2ce8ac4fc37a008fa28e0771c8c74c576b05 Mon Sep 17 00:00:00 2001 From: bunnei Date: Tue, 20 May 2014 18:50:16 -0400 Subject: ARM_Interface: added SaveContext and LoadContext functions for HLE thread switching --- src/core/arm/interpreter/arm_interpreter.cpp | 36 ++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'src/core/arm/interpreter/arm_interpreter.cpp') diff --git a/src/core/arm/interpreter/arm_interpreter.cpp b/src/core/arm/interpreter/arm_interpreter.cpp index c21ff04649..b8c46cdfca 100644 --- a/src/core/arm/interpreter/arm_interpreter.cpp +++ b/src/core/arm/interpreter/arm_interpreter.cpp @@ -101,3 +101,39 @@ void ARM_Interpreter::ExecuteInstructions(int num_instructions) { m_state->NumInstrsToExecute = num_instructions; ARMul_Emulate32(m_state); } + +/** + * Saves the current CPU context + * @param ctx Thread context to save + * @todo Do we need to save Reg[15] and NextInstr? + */ +void ARM_Interpreter::SaveContext(ThreadContext& ctx) { + memcpy(ctx.cpu_registers, m_state->Reg, sizeof(ctx.cpu_registers)); + memcpy(ctx.fpu_registers, m_state->ExtReg, sizeof(ctx.fpu_registers)); + + ctx.sp = m_state->Reg[13]; + ctx.lr = m_state->Reg[14]; + ctx.pc = m_state->pc; + ctx.cpsr = m_state->Cpsr; + + ctx.fpscr = m_state->VFP[1]; + ctx.fpexc = m_state->VFP[2]; +} + +/** + * Loads a CPU context + * @param ctx Thread context to load + * @param Do we need to load Reg[15] and NextInstr? + */ +void ARM_Interpreter::LoadContext(const ThreadContext& ctx) { + memcpy(m_state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers)); + memcpy(m_state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers)); + + m_state->Reg[13] = ctx.sp; + m_state->Reg[14] = ctx.lr; + m_state->pc = ctx.pc; + m_state->Cpsr = ctx.cpsr; + + m_state->VFP[1] = ctx.fpscr; + m_state->VFP[2] = ctx.fpexc; +} -- cgit v1.2.3