From ea6c1193fbfa95e586bb6d129dc684163a12cb3e Mon Sep 17 00:00:00 2001
From: Takoroka <137927095+Takoroka@users.noreply.github.com>
Date: Thu, 29 Oct 2026 03:39:29 -0400
Subject: Revert "Import experimental NS2 support and accumulated GPU fixes"

This reverts commit 535b676970. The Switch 2 support comes from the nx2
work instead, merged next.
---
 src/video_core/engines/draw_manager.cpp | 49 ---------------------------------
 1 file changed, 49 deletions(-)

(limited to 'src/video_core/engines/draw_manager.cpp')

diff --git a/src/video_core/engines/draw_manager.cpp b/src/video_core/engines/draw_manager.cpp
index a610fb1661..5891c25622 100644
--- a/src/video_core/engines/draw_manager.cpp
+++ b/src/video_core/engines/draw_manager.cpp
@@ -5,15 +5,11 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
 #include <cstring>
-#include <fstream>
-#include <cstdlib>
-#include <set>
 
 #include "common/settings.h"
 #include "video_core/dirty_flags.h"
 #include "video_core/engines/maxwell_3d.h"
 #include "video_core/rasterizer_interface.h"
-#include "video_core/memory_manager.h"
 
 namespace Tegra::Engines {
 
@@ -281,45 +277,6 @@ void Maxwell3D::DrawManager::ProcessDraw(Maxwell3D& maxwell3d, bool draw_indexed
     LOG_TRACE(HW_GPU, "called, topology={}, count={}", draw_state.topology, draw_indexed ? draw_state.index_buffer.count : draw_state.vertex_buffer.count);
     UpdateTopology(maxwell3d);
     if (maxwell3d.ShouldExecute()) {
-        auto& native = maxwell3d.GetNativeMacroEngine();
-        if (native.native_turing) {
-            const auto count = draw_indexed ? draw_state.index_buffer.count : draw_state.vertex_buffer.count;
-            if (!count || !instance_count) return;
-            if (native.native_execution_failed) return;
-            if (Settings::values.renderer_backend.GetValue() != Settings::RendererBackend::Vulkan) {
-                native.native_execution_failed = true;
-                LOG_ERROR(HW_GPU, "Native graphics shaders require the experimental Vulkan path");
-                return;
-            }
-            if (std::getenv("EDEN_NATIVE_DRAW_DIAGNOSTICS")) {
-                static thread_local std::set<std::array<GPUVAddr, Maxwell3D::Regs::MaxShaderProgram>> captured;
-                std::array<GPUVAddr, Maxwell3D::Regs::MaxShaderProgram> programs{};
-                for (size_t stage = 0; stage < programs.size(); ++stage) {
-                    if (!maxwell3d.regs.IsShaderConfigEnabled(stage)) continue;
-                    const auto& pipeline = maxwell3d.regs.pipelines[stage];
-                    programs[stage] = (GPUVAddr{pipeline.reserved[0] & 0xff} << 32) | pipeline.reserved[1];
-                }
-                if (captured.size() < 4096 && captured.insert(programs).second) {
-                    std::ofstream registers("native-graphics-registers.bin", std::ios::binary);
-                    registers.write(reinterpret_cast<const char*>(&maxwell3d.regs), sizeof(maxwell3d.regs));
-                    for (size_t stage = 0; stage < Maxwell3D::Regs::MaxShaderProgram; ++stage) {
-                        if (!maxwell3d.regs.IsShaderConfigEnabled(stage)) continue;
-                        const auto& pipeline = maxwell3d.regs.pipelines[stage];
-                        // C797 uses per-stage program addresses at 0x2014/0x2018,
-                        // unlike Maxwell's program-region plus 0x2004 offset.
-                        const GPUVAddr address = (GPUVAddr{pipeline.reserved[0] & 0xff} << 32) | pipeline.reserved[1];
-                        LOG_INFO(HW_GPU, "Native graphics shader stage={}, address={:#x}", stage, address);
-                        if (!maxwell3d.memory_manager.IsFullyMappedRange(address, 0x1000)) continue;
-                        std::array<u8, 0x1000> bytes{};
-                        maxwell3d.memory_manager.ReadBlockUnsafe(address, bytes.data(), bytes.size());
-                        std::ofstream shader("native-graphics-shader-" + std::to_string(stage) + ".bin", std::ios::binary);
-                        shader.write(reinterpret_cast<const char*>(bytes.data()), bytes.size());
-                    }
-                    LOG_DEBUG(HW_GPU, "Translating native graphics draw: indexed={}, vertices={}, instances={}",
-                              draw_indexed, count, instance_count);
-                }
-            }
-        }
         maxwell3d.rasterizer->Draw(draw_indexed, instance_count);
     }
 }
@@ -328,12 +285,6 @@ void Maxwell3D::DrawManager::ProcessDrawIndirect(Maxwell3D& maxwell3d) {
     LOG_TRACE(HW_GPU, "called, topology={}, is_indexed={}, includes_count={}, buffer_size={}, max_draw_count={}", draw_state.topology, indirect_state.is_indexed, indirect_state.include_count, indirect_state.buffer_size, indirect_state.max_draw_counts);
     UpdateTopology(maxwell3d);
     if (maxwell3d.ShouldExecute()) {
-        auto& native = maxwell3d.GetNativeMacroEngine();
-        if (native.native_turing) {
-            native.native_execution_failed = true;
-            LOG_ERROR(HW_GPU, "Native graphics shader translation required: indirect draw");
-            return;
-        }
         maxwell3d.rasterizer->DrawIndirect();
     }
 }
-- 
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