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authorDuck912 <350528965+Duck912@users.noreply.github.com>2026-11-01 21:41:29 -0500
committerDuck912 <350528965+Duck912@users.noreply.github.com>2026-11-01 21:54:48 -0500
commita169391e6019d6356cc0492c5a25cf7dbfc22fa3 (patch)
tree0dce3444db29d490bef16383491d0caeedc20d18 /src/video_core/buffer_cache/usage_tracker.h
parentef3ae4ae23b2148fac5b7b335c001b2802a9222b (diff)
shader: count only register writes in the callee link check
The check that a native callee keeps its link register read bits 16-23 of every instruction as a destination. RET was exempt, but BRA, NOP and ISETP/FSETP (which write predicates) also have zero there, so callees with an R0 link that compare or branch were rejected. IMAD.WIDE writes a register pair, so its second register now counts as well. Assisted-by: Claude Opus 5.5 (debugging, implementation and drafting) Signed-off-by: Duck912 <350528965+Duck912@users.noreply.github.com>
Diffstat (limited to 'src/video_core/buffer_cache/usage_tracker.h')
0 files changed, 0 insertions, 0 deletions