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authorTakoroka <137927095+Takoroka@users.noreply.github.com>2026-10-27 19:30:20 -0400
committerTakoroka <137927095+Takoroka@users.noreply.github.com>2026-10-27 19:30:20 -0400
commitf32b430326af86bd956f3d49d1bf7b6a1b9c5e31 (patch)
tree4dc321c41055bd68f1e1bb6707330df1ee9599fa /src/video_core/memory_manager.cpp
parenta750204a15561e8e22d40c50df8e0827eb45fd8f (diff)
Switch 2: native memory/images, GPU-accessible attribute, TSG subcontexts, syncpoint shim
- gsv 111/112/114/423/429/430/314/315/435 track native memory and images with real ids (meanings from changes.patch); 1510/435 use its block-linear layout. - svc 0x80 sets a real GpuAccessible (0x20) memory attribute (from changes.patch). - Characteristics report TSG subcontexts (flag 22, 64 per TSG at 0xb4); NvRm otherwise allows one subcontext and a second NVN queue fails its setup. - Syncpoint shim: flag 26, address-space ioctl 0xB, and GPU reads of the shim page return guest syncpoint values (scheme from changes.patch). - EDEN_NX2_IPC_TRACE also logs TIPC commands; gdbrsp.py watch/mem improvements.
Diffstat (limited to 'src/video_core/memory_manager.cpp')
-rw-r--r--src/video_core/memory_manager.cpp13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/video_core/memory_manager.cpp b/src/video_core/memory_manager.cpp
index 8ffdcb6276..0290500e7c 100644
--- a/src/video_core/memory_manager.cpp
+++ b/src/video_core/memory_manager.cpp
@@ -56,6 +56,10 @@ MemoryManager::MemoryManager(Core::System& system_, u64 address_space_bits_, GPU
: MemoryManager(system_, system_.Host1x().MemoryManager(), address_space_bits_, split_address_, big_page_bits_, page_bits_)
{}
+void MemoryManager::SetNativeSyncpointShim(GPUVAddr address) {
+ native_syncpoint_shim.store(address, std::memory_order_release);
+}
+
MemoryManager::~MemoryManager() = default;
MemoryManager::EntryType MemoryManager::GetEntry(size_t position, bool is_big_page) const {
@@ -231,6 +235,15 @@ std::optional<DAddr> MemoryManager::GpuToCpuAddress(GPUVAddr addr, std::size_t s
template <typename T>
T MemoryManager::Read(GPUVAddr addr) const {
+ if constexpr (sizeof(T) == sizeof(u32)) {
+ const auto shim = native_syncpoint_shim.load(std::memory_order_acquire);
+ if (shim && addr >= shim && addr - shim < NumShimSyncpoints * sizeof(u32) &&
+ Common::IsAligned(addr - shim, sizeof(u32))) {
+ return static_cast<T>(system.Host1x().GetSyncpointManager().GetGuestSyncpointValue(
+ static_cast<u32>((addr - shim) / sizeof(u32))));
+ }
+ }
+
if (auto page_pointer{GetPointer(addr)}; page_pointer) {
// NOTE: Avoid adding any extra logic to this fast-path block
T value;