[vulkan] Fix regressions found in last stable release (#3953)

This PR aims to fix some regressions found in the latest release 0.2.0, which were a bunch of constant crashes/ random on certain Android devices with issues with the PiP configuration, addressing some problems founds for AMD after the maintenance of 2nd Global Vulkan Maintenance.

-> Fixes Final Fantasy Tactics on AMD (no longer requires of generic bits to work "all commands bit")
-> Fixes some performance regressions on android due to the Tomodachi fix applied globally as common behavior (#3898, #3900)
-> Fixes blittering of screen found on ARM Windows devices and QCOM stock drivers (Android and ARM Windows) related to Mario Kart 8 Deluxe strange blittering in races, caused by a strange race condition with the ResetQueryPool and mostly the workaround for presync
-> Fixes issues on Luigi's Mansion 3 issue where the pause screen became black on AMD due to the early reset of queries.
-> Fixes crashes on Mario Party Jamboree for AMD/ Nvidia.
-> Keeps previous fixes related to crashes on AMD with other games such as Astral Chain, Fire Emblem Three Houses and Xenoblade 3 based on the lack of access to vertex fragment replaced with generic flags.
-> Fixes TOTK RADV skybox lighting.

--------
Credits:
@melod-y
@Gidoly
@MaranBr
@AlexWolff
@Lizzie

And all the people who contributed into the reporting issues/ helping with the bisect.

Co-authored-by: lizzie <lizzie@eden-emu.dev>
Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/3953
Reviewed-by: Lizzie <lizzie@eden-emu.dev>
Reviewed-by: crueter <crueter@eden-emu.dev>

1 files changed, 1 insertions, 1 deletions

diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
index e9c252fba6..4af78c4ac6 100644
--- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp
+++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
@@ -580,7 +580,7 @@ void RasterizerVulkan::DispatchCompute() {
         .srcAccessMask = VK_ACCESS_MEMORY_WRITE_BIT,
         .dstAccessMask = VK_ACCESS_MEMORY_READ_BIT,
     };
-    scheduler.Record([](vk::CommandBuffer cmdbuf) { cmdbuf.PipelineBarrier(VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
+    scheduler.Record([](vk::CommandBuffer cmdbuf) { cmdbuf.PipelineBarrier(vk::PIPELINE_STAGE_GRAPHICS_COMPUTE_TRANSFER, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
                                0, READ_BARRIER); });
     scheduler.Record([dim](vk::CommandBuffer cmdbuf) { cmdbuf.Dispatch(dim[0], dim[1], dim[2]); });