diff options
| author | lizzie <lizzie@eden-emu.dev> | 2026-02-19 04:07:45 +0100 |
|---|---|---|
| committer | crueter <crueter@eden-emu.dev> | 2026-02-19 04:07:45 +0100 |
| commit | ab129cf314f631d9c71ca264ef55a57d36e5b882 (patch) | |
| tree | 75efd62ce0224c41ba9d89e9d27cdfb582bfe34d /src/video_core/renderer_vulkan/vk_rasterizer.cpp | |
| parent | 72b3f3a8a597feeb8fbbc1a009182b737ba40e2d (diff) | |
Revert "[vk] Simplified layouts per driver configuration (#3271)" (#3571)
causes evil VUID bullshit
This reverts commit 75fda70db293123817b8852632fd47a6984741a4.
Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/3571
Reviewed-by: CamilleLaVey <camillelavey99@gmail.com>
Co-authored-by: lizzie <lizzie@eden-emu.dev>
Co-committed-by: lizzie <lizzie@eden-emu.dev>
Diffstat (limited to 'src/video_core/renderer_vulkan/vk_rasterizer.cpp')
| -rw-r--r-- | src/video_core/renderer_vulkan/vk_rasterizer.cpp | 17 |
1 files changed, 4 insertions, 13 deletions
diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp index 4d508fc2f2..60b899a811 100644 --- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp +++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp @@ -586,23 +586,14 @@ void RasterizerVulkan::DispatchCompute() { } const std::array<u32, 3> dim{qmd.grid_dim_x, qmd.grid_dim_y, qmd.grid_dim_z}; scheduler.RequestOutsideRenderPassOperationContext(); - // Compute shader reads from storage buffers, uniforms, and images static constexpr VkMemoryBarrier READ_BARRIER{ .sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER, .pNext = nullptr, - .srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT | VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT, - .dstAccessMask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_UNIFORM_READ_BIT, + .srcAccessMask = VK_ACCESS_MEMORY_WRITE_BIT, + .dstAccessMask = VK_ACCESS_MEMORY_READ_BIT, }; - scheduler.Record([](vk::CommandBuffer cmdbuf) { - // Memory writes can come from graphics or compute stages - const VkPipelineStageFlags src_stages = - VK_PIPELINE_STAGE_VERTEX_SHADER_BIT | - VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT | - VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT | - VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT; - cmdbuf.PipelineBarrier(src_stages, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, - 0, READ_BARRIER); - }); + scheduler.Record([](vk::CommandBuffer cmdbuf) { cmdbuf.PipelineBarrier(VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, + 0, READ_BARRIER); }); scheduler.Record([dim](vk::CommandBuffer cmdbuf) { cmdbuf.Dispatch(dim[0], dim[1], dim[2]); }); // Log compute dispatch |