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| author | LC <mathew1800@gmail.com> | 2020-08-13 15:13:21 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-08-13 15:13:21 -0400 |
| commit | 77a3efb1c52e69fd05b1d83fbeee34cd0202af56 (patch) | |
| tree | 6642ba786c7158933e3d1e2fb41a1aa1a6e30a63 /src/video_core/shader/control_flow.cpp | |
| parent | d7958019b63e1730f453b48235f9a1f5a2c3c789 (diff) | |
| parent | 78ddcbe3ba0f8f5740149bff2054e2dffc0e9d83 (diff) | |
Merge pull request #4511 from lioncash/build2
General: Tidy up clang-format warnings part 2
Diffstat (limited to 'src/video_core/shader/control_flow.cpp')
| -rw-r--r-- | src/video_core/shader/control_flow.cpp | 30 |
1 files changed, 16 insertions, 14 deletions
diff --git a/src/video_core/shader/control_flow.cpp b/src/video_core/shader/control_flow.cpp index 8d86020f6a..336397cdb5 100644 --- a/src/video_core/shader/control_flow.cpp +++ b/src/video_core/shader/control_flow.cpp @@ -187,24 +187,26 @@ std::optional<std::pair<BufferInfo, u64>> TrackLDC(const CFGRebuildState& state, std::optional<u64> TrackSHLRegister(const CFGRebuildState& state, u32& pos, u64 ldc_tracked_register) { - return TrackInstruction<u64>(state, pos, - [ldc_tracked_register](auto instr, const auto& opcode) { - return opcode.GetId() == OpCode::Id::SHL_IMM && - instr.gpr0.Value() == ldc_tracked_register; - }, - [](auto instr, const auto&) { return instr.gpr8.Value(); }); + return TrackInstruction<u64>( + state, pos, + [ldc_tracked_register](auto instr, const auto& opcode) { + return opcode.GetId() == OpCode::Id::SHL_IMM && + instr.gpr0.Value() == ldc_tracked_register; + }, + [](auto instr, const auto&) { return instr.gpr8.Value(); }); } std::optional<u32> TrackIMNMXValue(const CFGRebuildState& state, u32& pos, u64 shl_tracked_register) { - return TrackInstruction<u32>(state, pos, - [shl_tracked_register](auto instr, const auto& opcode) { - return opcode.GetId() == OpCode::Id::IMNMX_IMM && - instr.gpr0.Value() == shl_tracked_register; - }, - [](auto instr, const auto&) { - return static_cast<u32>(instr.alu.GetSignedImm20_20() + 1); - }); + return TrackInstruction<u32>( + state, pos, + [shl_tracked_register](auto instr, const auto& opcode) { + return opcode.GetId() == OpCode::Id::IMNMX_IMM && + instr.gpr0.Value() == shl_tracked_register; + }, + [](auto instr, const auto&) { + return static_cast<u32>(instr.alu.GetSignedImm20_20() + 1); + }); } std::optional<BranchIndirectInfo> TrackBranchIndirectInfo(const CFGRebuildState& state, u32 pos) { |