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| author | Takoroka <137927095+Takoroka@users.noreply.github.com> | 2026-10-28 14:36:54 -0400 |
|---|---|---|
| committer | Takoroka <137927095+Takoroka@users.noreply.github.com> | 2026-10-28 14:36:54 -0400 |
| commit | 921cd20e3ab302f3537fead1b73fd3cfa835da09 (patch) | |
| tree | bf61641ca74b2435e799d1411720545459bbadfb /src/video_core/shader_cache.cpp | |
| parent | e7cc2cea290280e519ce011049063a9e40e7cc9c (diff) | |
Switch 2 shaders: compute forms (LDS uniform base, ATOMG, RED, STG.U16) and more
- LDS [Ra.Xn + URb]; ATOMG.ADD at a register address; RED at [URa+offset];
8/16-bit STG; REDUX.MAX; R2UR and REDUX into any uniform register.
- UIMAD immediate; F2I from a uniform register; FSET.BF combined with a
predicate; TXQ single component to an odd register; SHF.L.W.HI of an
immediate by a register.
Title 1's dumped programs: 1654 of 1667 lower (the rest: 12 task/mesh
programs using ISBERD/ISBEWR, and one SURED).
Diffstat (limited to 'src/video_core/shader_cache.cpp')
0 files changed, 0 insertions, 0 deletions