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| author | Takoroka <137927095+Takoroka@users.noreply.github.com> | 2026-10-31 10:31:41 -0400 |
|---|---|---|
| committer | Takoroka <137927095+Takoroka@users.noreply.github.com> | 2026-10-31 10:31:41 -0400 |
| commit | 049c9633edd9b3f7eaed6b4b3a18a4ead0cd18b7 (patch) | |
| tree | a249860ff43f615ac3e3ee4b7eb03eac5317836a /src/video_core/shader_environment.cpp | |
| parent | 8ac95d5e42fc571279eede89bfd0a4f83d2783d2 (diff) | |
nx2: read texture handles that hold a header byte offset
Switch Sports' scenery shaders take their 64-bit texture handles from a uniform
register, and the texture part of those handles is the header's byte offset in the
pool (index * 32), not its index: 0x96e46000 names header 8960 (a 640x152 2D
texture), while the plain reading, 286720, runs far past the 33067-entry pool. Eden
skipped them at draw time (null view) and built the shaders for a garbage header, so
the island's ground, cliffs and buildings drew black.
When a handle's index falls past the pool but index / 32 lands inside it, take that
header, both when building the shader and when binding the view. Handles that
already resolve keep their meaning.
Diffstat (limited to 'src/video_core/shader_environment.cpp')
| -rw-r--r-- | src/video_core/shader_environment.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/video_core/shader_environment.cpp b/src/video_core/shader_environment.cpp index 9d189ad4f0..532b1f97f4 100644 --- a/src/video_core/shader_environment.cpp +++ b/src/video_core/shader_environment.cpp @@ -315,8 +315,9 @@ std::optional<u64> GenericEnvironment::TryFindSize() { Tegra::Texture::TICEntry GenericEnvironment::ReadTextureInfo(GPUVAddr tic_addr, u32 tic_limit, bool via_header_index, u32 raw) { const auto handle{Tegra::Texture::TexturePair(raw, via_header_index)}; - ASSERT(handle.first <= tic_limit); - const GPUVAddr descriptor_addr{tic_addr + handle.first * sizeof(Tegra::Texture::TICEntry)}; + const u32 index{Tegra::Texture::TextureHeaderIndex(handle.first, tic_limit)}; + ASSERT(index <= tic_limit); + const GPUVAddr descriptor_addr{tic_addr + index * sizeof(Tegra::Texture::TICEntry)}; Tegra::Texture::TICEntry entry; gpu_memory->ReadBlock(descriptor_addr, &entry, sizeof(entry)); return entry; |
