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-rw-r--r--src/video_core/buffer_cache/buffer_cache.h8
-rw-r--r--src/video_core/buffer_cache/buffer_cache_base.h19
2 files changed, 25 insertions, 2 deletions
diff --git a/src/video_core/buffer_cache/buffer_cache.h b/src/video_core/buffer_cache/buffer_cache.h
index b909971e42..0a6b53b33b 100644
--- a/src/video_core/buffer_cache/buffer_cache.h
+++ b/src/video_core/buffer_cache/buffer_cache.h
@@ -252,7 +252,9 @@ bool BufferCache<P>::DMACopy(GPUVAddr src_address, GPUVAddr dest_address, u64 am
const DAddr diff = base_address - *cpu_src_address;
const DAddr new_base_address = *cpu_dest_address + diff;
tmp_intervals.push_back({new_base_address, size});
- uncommitted_gpu_modified_ranges.Add(new_base_address, size);
+ if (AsyncBufferDownloads()) {
+ uncommitted_gpu_modified_ranges.Add(new_base_address, size);
+ }
};
gpu_modified_ranges.ForEachInRange(*cpu_src_address, amount, mirror);
// This subtraction in this order is important for overlapping copies.
@@ -1574,7 +1576,9 @@ void BufferCache<P>::MarkWrittenBuffer(BufferId buffer_id, DAddr device_addr, u3
}
memory_tracker.MarkRegionAsGpuModified(device_addr, size);
gpu_modified_ranges.Add(device_addr, size);
- uncommitted_gpu_modified_ranges.Add(device_addr, size);
+ if (AsyncBufferDownloads()) {
+ uncommitted_gpu_modified_ranges.Add(device_addr, size);
+ }
}
template <class P>
diff --git a/src/video_core/buffer_cache/buffer_cache_base.h b/src/video_core/buffer_cache/buffer_cache_base.h
index 57011752cc..6d6d873b75 100644
--- a/src/video_core/buffer_cache/buffer_cache_base.h
+++ b/src/video_core/buffer_cache/buffer_cache_base.h
@@ -7,6 +7,7 @@
#pragma once
#include <algorithm>
+#include <cstdlib>
#include <array>
#include <bit>
#include <functional>
@@ -514,6 +515,24 @@ private:
MemoryTracker memory_tracker;
Common::RangeSet<DAddr> uncommitted_gpu_modified_ranges;
+
+ /// Whether GPU-written buffer ranges are copied back to guest memory at the next fence;
+ /// otherwise only when something flushes them (as upstream yuzu below High GPU accuracy).
+ /// Not for Switch 2 titles: title 1 had 250-330 MB/s copied back (a fence per compute
+ /// dispatch, the fencing thread holding the buffer cache while it wrote them), while its CPU
+ /// read GPU-written memory at most 64 times in 200 s (counted with reactive flushing) and
+ /// the native MME's DMA reads never touched those pages. Without them a fence costs ~1 us
+ /// instead of ~5 and draw setup ~7% less. EDEN_NX2_BUFFER_DOWNLOADS=0/1 forces it.
+ bool AsyncBufferDownloads() const {
+ static const int forced = [] {
+ const char* value = std::getenv("EDEN_NX2_BUFFER_DOWNLOADS");
+ return value == nullptr ? -1 : (value[0] == '0' ? 0 : 1);
+ }();
+ if (forced >= 0) {
+ return forced == 1;
+ }
+ return gpu_memory == nullptr || !gpu_memory->UsesNativeTiling();
+ }
Common::RangeSet<DAddr> gpu_modified_ranges;
std::deque<Common::RangeSet<DAddr>> committed_gpu_modified_ranges;