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authorTakoroka <137927095+Takoroka@users.noreply.github.com>2026-10-30 11:51:27 -0400
committerTakoroka <137927095+Takoroka@users.noreply.github.com>2026-11-01 11:05:52 -0500
commit2f2b0a746832e94ea244062fdffa92102e9c5b6c (patch)
tree06ddd3c34284e90828df6042ef734cd729f02a39 /src
parentf9c6ae332a0fb36ae1e2f0534e09b3094d5eb675 (diff)
nx2: lower ATOMS.POPC.INC with an immediate offset
The shared-memory increment was only lowered at a zero offset; Nintendo Switch Sports Resort increments [R10+0x4]. Maxwell ATOMS takes the word offset in its immediate field.
Diffstat (limited to 'src')
-rw-r--r--src/shader_recompiler/frontend/ampere/lower_to_maxwell.h8
1 files changed, 5 insertions, 3 deletions
diff --git a/src/shader_recompiler/frontend/ampere/lower_to_maxwell.h b/src/shader_recompiler/frontend/ampere/lower_to_maxwell.h
index ce69f59161..9568951012 100644
--- a/src/shader_recompiler/frontend/ampere/lower_to_maxwell.h
+++ b/src/shader_recompiler/frontend/ampere/lower_to_maxwell.h
@@ -884,8 +884,9 @@ inline LoweredProgram LowerToMaxwell(std::span<const Instruction> code) {
break;
}
case 0xf8c: { // ATOMS.POPC.INC.32 with no returned value: one increment per active lane.
- const u32 stride = insn.Bits(78, 2);
- if (dest != 255 || insn.words[1] || (insn.words[2] & ~0xc000U) != 0x0d00003f)
+ const u32 stride = insn.Bits(78, 2), offset = insn.Bits(40, 24);
+ if (dest != 255 || (insn.words[1] & 0xff) || (offset & 3) ||
+ (insn.words[2] & ~0xc000U) != 0x0d00003f)
return fail(index, "native shared increment mode");
u32 address = insn.Bits(24, 8);
if (stride && address != 255) {
@@ -894,7 +895,8 @@ inline LoweredProgram LowerToMaxwell(std::span<const Instruction> code) {
address = 251;
}
mov_imm(250, 1);
- emit(0xec00000000000000ULL | predicate | 255 | (u64{address} << 8) | (u64{250} << 20));
+ emit(0xec00000000000000ULL | predicate | 255 | (u64{address} << 8) | (u64{250} << 20) |
+ (u64{offset >> 2} << 30));
break;
}
case 0x38c: { // ATOMS.ADD.U32, naturally aligned shared byte offset.