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path: root/src/video_core/shader_cache.cpp
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* nx2: capture and lower native shader programs oncekraibse2 days1-2/+5
| | | | | | | | | | | | | Native programs were captured and lowered when their ShaderInfo was made and again for every environment built for their pipelines. The ShaderInfo now keeps the lowered code and the environments adopt it. Capture also reads a 4 KiB page at a time instead of flushing caches per instruction, and cached native programs fold bank 1 reads like live ones. Ported from Wael3rd/Eglantine-MKW (0ae093058e, 65a6aa877a, df076133c4). Assisted-by: Claude Sonnet 5.5 (porting the fixes) (cherry picked from commit 3af11ac401ad3061c183281d8c98c16c1d6da456)
* video_core: draw Switch 2 task/mesh pipelines with VK_EXT_mesh_shaderTakoroka3 days1-0/+27
| | | | | | | | | | | | | While SET_MESH_CONTROL is on, a native draw binds a task program in the vertex slot, its mesh program in the tessellation slot and a header-only pass-through geometry program naming the per-primitive outputs. Translate the first two as task and mesh programs with the mesh registers (SET_MESH_SHADER_A/B, SET_MESH_INIT_SHADER) and that header, key their pipelines by them, and build pipelines with task/mesh stages and no vertex input, input assembly or tessellation state. The draw's vertex count is the number of task workgroups: record vkCmdDrawMeshTasksEXT. Enable VK_EXT_mesh_shader (task and mesh only) when the host has it; draws are skipped without it, as they were before.
* nx2: memo for compute macros; one lock per inline upload; cheaper shader ↵Takoroka6 days1-1/+8
| | | | | | | | | | | | | | | invalidation - Compute engine macros replay repeated calls like 3D ones (title 1's compute macro path fell from ~27% to ~14% of the GPU thread). - AccelerateInlineToMemory takes the buffer and texture cache mutexes together instead of one after the other. - ShaderCache::InvalidatePagesInRegion looks at the rejected programs only when the write can reach one (bounds kept as they are added); it ran a locked scan for every inline upload and pre-draw invalidation. Inline uploads went from ~10% to ~4% of the GPU thread.
* nx2: measure the TSC on AMD, no rethrows for rejected shaders, debug hooks ↵Takoroka6 days1-0/+12
| | | | | | | | | | | | | | | off the hot path - AMD CPUs have no CPUID leaf 0x15, so the TSC frequency stayed 0 and every guest CNTPCT read went through QueryPerformanceCounter (~10% of the game's main core in title 1). Measure it like Intel CPUs without a crystal frequency. - A rejected native shader was rethrown (two C++ throws) every time it was bound; return false instead (~1-2% of the GPU thread). - The semaphore watch, pushbuffer entry hashing, first-write trace and per-macro debug logs ran on every command word or macro call; they now cost a flag check unless their environment variable is set (~4% of the GPU thread). Also starts the macro engine's profile zone.
* Jump-table programs end at their self-branch; aligned wide zero storesTakoroka6 days1-18/+25
| | | | | | | | | | | - With a BRX the jump targets live in a constant buffer, so capture and lowering keep going past EXITs to the compiler's closing branch-to-self (a title 1 compute program jumped to 0xae0, just past the first EXIT). - 128-bit stores of RZ use R248-R251 (Eden wants 4-aligned data registers). - The rejected-program cache covers environment construction, where native programs are lowered (it never applied before), and logs the stage slot. Title 1 reaches its title screen with the ground drawn.
* IMAD.SHL as a shift; EDEN_NX2_REJECT; log where rejected programs are boundTakoroka6 days1-1/+17
| | | | | | | | | | - IMAD by a power of two lowers to SHL imm, the form Eden's jump-table tracking expects (a title 1 compute program failed "track indirect branch"). - EDEN_NX2_REJECT=<hex addresses>: treat those native programs as rejected, to bisect a behaviour change without rebuilding. - A rejected graphics program logs its stage slot, header and slot registers once (for the task/mesh pipeline setup). - Notes: rows 87-92, title 1 status.
* Cache rejected native shaders and log each rejection onceTakoroka6 days1-2/+28
| | | | | | | A rejected program was lowered again (and logged) on every draw or dispatch: 1.7M log lines in 13 minutes of title 1. The shader cache keeps the first exception per address until guest memory there is written, and the error logs are deduplicated.
* nx2: lower every shader title 4 uses in gameTakoroka7 days1-0/+17
| | | | | | | | | | | | - Tensor-core ops for its neural compute pass: HMMA.16816.F16 (SHFL + HFMA2), MOVM.16.MT88 and LDSM .MT88. Opt-in via EDEN_NX2_TENSOR: the expansion (372 HMMAs) takes the host driver minutes to compile. - HSETP2 with an immediate half pair; skip @!PT instructions. - Constant bank 24, read only by three NVN2 fullscreen vertex shaders and never bound by the game, reads from bank 17 (also never bound: zeros, as on hw). - Debug dumps of the vertex stage's bound constant buffers on rejection. All 214 shaders captured after the menu lower (213 without EDEN_NX2_TENSOR).
* Switch 2: Turing macros, native compute, Ampere shader lowering, native tilingTakoroka7 days1-7/+23
| | | | | | | | | | | | | | | | | From changes.patch: the TU104/GA10x MME interpreter (shared macro context for the process's channels, also on the compute class), native compute with QMD 3.0 dependency scheduling, the Ampere-to-Maxwell shader lowering, native vertex stream sizes, and the console's GOB swizzle for textures, DMA copies and the host unswizzle shaders. Switch 2 channels turn all of it on at init. The lowering is widened for title 4 (all 32 of its programs lower): general TEX (any dimension/LOD/mask, operand split 1+1/2+1/2+2/4+n, any but consistent descriptor buffer), cube/array, SULD channel masks, 128-bit STG, indexed IPA, VOTE, SHFL with any immediate or predicate output, R2P/P2R byte select, uniform ULOP3/ULEA/UBREV/UFLO.SH/UISETP signed/UMOV URZ, IMNMX cbuf, IADD3 and FFMA uniform operands, FMUL /4 /8 x8, and BSSY/BSYNC/BREAK/WARPSYNC as no-ops. The capture stops at unmapped memory. EDEN_NX2_SHADER_DUMP dumps every native program; tools in C:\dev\nx2work test the lowering offline.
* [fmt] use {#:x} instead of 0x{:#x} (#4170)lizzie2026-07-251-3/+3
| | | | | | | | | | continuation of #309 but applying to even more files than before :) also makes them lowercase because `0xfafafa` is better as `0XFAFAFA` Signed-off-by: lizzie <lizzie@eden-emu.dev> Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/4170 Reviewed-by: CamilleLaVey <camillelavey99@gmail.com> Reviewed-by: Maufeat <sahyno1996@gmail.com>
* [compat] Debian stable gcc12/clang14 compilation fixes (#2763)lizzie2025-10-181-12/+11
| | | | | | | | | | | | | Mainly because - while we can just give out an AppImage and call it a day - building natively should be an option for all major distros. And "base" stable debian doesn't provide a new enough g++/clang++ so... we need to make some "fixups". Signed-off-by: lizzie <lizzie@eden-emu.dev> Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/2763 Reviewed-by: crueter <crueter@eden-emu.dev> Reviewed-by: MaranBr <maranbr@eden-emu.dev> Co-authored-by: lizzie <lizzie@eden-emu.dev> Co-committed-by: lizzie <lizzie@eden-emu.dev>
* Core: Clang format and other small issues.Fernando Sahmkow2024-01-181-1/+2
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* SMMU: Initial adaptation to video_core.Fernando Sahmkow2024-01-181-3/+4
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* Revert "video_core: use interval map for page count tracking"liamwhite2023-12-171-2/+2
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* video_core: use interval map for page count trackingLiam2023-12-141-2/+2
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* Fix shader dumps with nvdisasmKelebek12023-08-031-0/+5
| | | | | skip fragment shaders when rasterizer is disabled initialize env_ptrs
* Memory Tracking: Optimize tracking to only use atomic writes when contested ↵Fernando Sahmkow2023-06-281-1/+1
| | | | with the host GPU
* Remove memory allocations in some hot pathsKelebek12023-06-221-3/+1
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* Fix code resize to use word size rather than byte sizeKelebek12023-05-021-2/+2
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* Update 3D regsKelebek12022-10-071-6/+6
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* VideoCore: implement channels on gpu caches.Fernando Sahmkow2022-10-061-18/+15
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* code: dodge PAGE_SIZE #defineKyle Kienapfel2022-08-191-6/+6
| | | | | | | | | | | | | | | | | | | | | Some header files, specifically for OSX and Musl libc define PAGE_SIZE to be a number This is great except in yuzu we're using PAGE_SIZE as a variable Specific example `static constexpr u64 PAGE_SIZE = u64(1) << PAGE_BITS;` PAGE_SIZE PAGE_BITS PAGE_MASK are all similar variables. Simply deleted the underscores, and then added YUZU_ prefix Might be worth noting that there are multiple uses in different classes/namespaces This list may not be exhaustive Core::Memory 12 bits (4096) QueryCacheBase 12 bits ShaderCache 14 bits (16384) TextureCache 20 bits (1048576, or 1MB) Fixes #8779
* general: Convert source file copyright comments over to SPDXMorph2022-04-231-3/+2
| | | | | This formats all copyright comments according to SPDX formatting guidelines. Additionally, this resolves the remaining GPLv2 only licensed files by relicensing them to GPLv2.0-or-later.
* video_core: Replace lock_guard with scoped_lockMerry2022-04-071-1/+1
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* video_core/shader_cache: Take std::span in RemoveShadersFromStorage()Lioncash2022-02-011-2/+2
| | | | | Same behavior, but without the need to move into the function to avoid an allocation.
* shader: Initial OpenGL implementationReinUsesLisp2021-07-221-0/+17
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* shader: Move pipeline cache logic to separate filesReinUsesLisp2021-07-221-0/+233
Move code to separate files to be able to reuse it from OpenGL. This greatly simplifies the pipeline cache logic on Vulkan. Transform feedback state is not yet abstracted and it's still intrusively stored inside vk_pipeline_cache. It will be moved when needed on OpenGL.
generated by cgit v1.2.3 (git 2.39.1) at 2026-11-04 04:50:38 +0000